Processing-in-Memory Course: Programming PIM Architectures by Onur & Juan

The course provides a software view of PIM Architecture like Intel does in its "Intel Manual for software people".

Also, DRAM Processing Unit is a long discussed topic to utilize the DRAM bandwidth.

UPMEM provides processing in DRAM Engine.

The introduction of PIM is to utilize large memory bandwidth and save cycles of on-chip memory compute.

Setups are DDR R-DIMM with 8GB+128DPUs and 2x-nm DRAM process.

还是有个指令集把代码打到对面的

Reference

1. https://www.youtube.com/watch?v=RaOIoOQ5EgE
2. ^ ServeTheHome (2021-05-30). "DPU vs SmarNICs vs Exotic FPGAs". ServeTheHome. Retrieved 2022-01-03.